In order to reduce power consumption, conventional Solid State Drive (SSD) controllers power down portions of the controller when they are not in use. When the flash control logic and/or I/O processing are powered down, the flash interface is left in an unknown or undesirable state. From a functional perspective, the power down operations are benign. However, a reset of the flash devices is needed to ensure proper operation when the logic is powered back up. Such a reset operation is both power and time intensive.